Regviz

Silicon Labs /EFR32FG23A010F512GM48 /RAC_NS /LNAMIXTRIM4

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LNAMIXTRIM4

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32FG23B010F512IM40/RAC_S/LNAMIXTRIM4#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LNAMIXRFPKDBWSEL 0LNAMIXRFPKDCALCMLO 0LNAMIXRFPKDCALCMHI 0 (thresh_0)LNAMIXRFPKDTHRESHSELLO 0 (thresh_0)LNAMIXRFPKDTHRESHSELHI

LNAMIXRFPKDTHRESHSELHI=thresh_0, LNAMIXRFPKDTHRESHSELLO=thresh_0

Description

No Description

Fields

LNAMIXRFPKDBWSEL

LNAMIXRFPKDBWSEL
LNAMIXRFPKDCALCMLO

LNAMIXRFPKDCALCMLO
LNAMIXRFPKDCALCMHI

LNAMIXRFPKDCALCMHI
LNAMIXRFPKDTHRESHSELLO

LNAMIXRFPKDTHRESHSELLO

0 (thresh_0): undefined

1 (thresh_20m): undefined

2 (thresh_30m): undefined

3 (thresh_40m): undefined

4 (thresh_50m): undefined

5 (thresh_60m): undefined

6 (thresh_70m): undefined

7 (thresh_80m): undefined

8 (thresh_90m): undefined

9 (thresh_100m): undefined
LNAMIXRFPKDTHRESHSELHI

LNAMIXRFPKDTHRESHSELHI

0 (thresh_0): undefined

1 (thresh_20m): undefined

2 (thresh_30m): undefined

3 (thresh_40m): undefined

4 (thresh_50m): undefined

5 (thresh_60m): undefined

6 (thresh_70m): undefined

7 (thresh_80m): undefined

8 (thresh_90m): undefined

9 (thresh_100m): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data